Docs update (round 2)

Fixed spelling error

Updated README with latest install information
Updated index.rst to include some info from the README
Cleaned up How-to-install-casperfpga

Reworked layout for read-the-docs
Updated installation guide

Reworked layout for read-the-docs
Updated installation guide

Reset casperfpga location in README to casper-astro

casperfpga install bug fix

Allow configuration of multicast on all interfaces

Any of the four 40GbE network interfaces on the SKARAB can now be
configured for multicast. Also includes error handling in the event that
the user attempts to configure an interface that is out of range or an
interface that is not present in the compiled design. The IGMP leave
command now also works for any of the 40GbE network interfaces.

Resolves: ST-156

The setup.py file was defining progska as a Python module and a Python
extension. As a result of this, katversion, a Python package that
handles version information, was expecting an __init__.py file for
progska. The setup.py file has been modified to treat progska only as a
Python extension and not a module.

Resolves: ST-227

Gbe no local state

The ip_address, port and mac address for the ongbe and tengbe classes
are now attributes that call an underlying method to retrieve this
information from the processing node.

These changes are untested for the tengbe and onegbe classes.

Resolves: CBFTASKS-821 (jira)

The ip address, port and mac address of the processing nodes were
previously stored locally in class attributes. This change sees these
attributes call methods that retrieve this information from the
processing node. All other methods that rely on these attributes behave
as expected without modification.

This commit applies this change to the parent gbe class and the
fortygbe child class.

Resolves: CBFTASKS-821 (jira)

Wishbone out of range addr

Merge error handling support for out-of-range wishbone memory addresses.

Adds error handing for out-of-range wishbone transactions (rw/wr) for
the SKARAB transport platform.

Addressing out-of-range wishbone memory addresses previously caused the
SKARAB board to lockup. A new MicroBlaze version catches these errors
and propagates them back up to casperfpga where the user is informed
that the transaction failed due to an out-of-range address.

Maintains backward compatibility with older MicroBlaze versions.

Resolves: ST-153

Not all top-level reads/writes were calling the defined low-level
wishbone read/write methods. This has been corrected and enables more
robust error handling.

Add error handling for reads and writes to wishbone addresses that are
out of range. Initial support for error handling added. Modified
wishbone command packet structures to include field for error_status.
Maintains backwards compatibility with older MicroBlaze versions. Needs
to be tested. And other methods of transport_skarab need to be
refactored to take full advantage of this.

Refactor of tengbe.py code

The method reading the registers wasn't correctly parsing the bitfields
in the various registers. This has been fixed.

Also removed any hard coded addresses and uses the defined register map
attribute.

Older fpg headers don't contain the address and size of the 40GbE cores.
This causes an error with the new changes to support multiple 40GbE
links. This hot fix allows older fpg files to still work - it hard codes
the address and size of the 40GbE core.

Add support for 40GbE Multilink Architecture

Added a method to the SkaraFpga transport layer class to facilitate easy
updating of the global response time for requests that are sent to the
skarabs. This function was added to facilitate updating the global
response time across a number of boards via corr2.

CBFTASKS-812

Always use katversion for assigning version info.
Updated author.

Individual 40GbE cores are now instantiated independently. Information
e.g. addresses, parameters are read from the fpg file header. No
parameters are hardcoded in casperfpga.

Also removed support for legacy register maps for the GbE cores.

Work in progress. Added support for additional cores and dynamically
assigning the address based on the contents of the fpg file header.
Still requires testing and clean up.

Clean up upload_to_ram_and_program method - JIRA: CBFTASKS-803

Cleaned up the upload_to_ram_and_program method. If programming a board
fails, we no longer populate the system information. Also cleaned up the
passing of unique parameters to the transport layers. e.g. the
chunk_size parameter for skarab. This can be passed as a kwarg to
upload_to_ram_and_program and is handled appropriately in the underlying
transport layer.

The wait_after_reboot function waits for SKARABs to come back after
being reprogrammed and checks if they're reachable and running the
correct firmware. Exceptions were not being handled properly in some of
the underlying functions causing the function to bail when not getting a
response from a SKARAB. This has been fixed in this commit.

Otherwise you get:
fpga.adcs.adc_name.adc which is confusing