This fixes port/wire names in the sys_block yellow block and the reg_name used
in its axi4lite_interface so that everything matches up and gets properly
connected in top.v.

HMC IP Fix

Removing those weird assign statements

These are not required any more as the signals are connected up
directly.
It probably should have been done this way in the first place.

The hmc_user_axi_fifo.xci ip was locked. I upgraded it to get it to compile.

M2021a

40gbe changes so skarab 40gbe (hopefully) works alongside other 40gbe…

40gbe changes so skarab 40gbe (hopefully) works alongside other 40gbes. Tested on a skarab and works

Updating the gpio driving the au50 cattrip pin

This should have been driving the pin low and not high.

Still need to investigate why the SARAO au50s work with this set to 1.

Au50

Removing the incorrect PATH to MODEL_COMPOSER_PATH rather than
COMPOSER_PATH

Removing the numpy version requirement from requirements.txt

Removing the importIPython from bram.py

Documentation updates

removed bus_expand_callback

The bahaviour of mask callbacks seems to have changed in Simulink.

When setting up an fft_wideband_real, the first change of parameters
succeeded but sebsequent changes caused an error while the init
scripts ran.

The mask callback on some parameters in the bus_expand block
caused a cascade of calls to itself, as well as bus_expand_init that
resulted in an erroneous error.

The solution has been to remove the mask callback. This means that
the mask does not change depending on parameter changes as before
but this does not change operation, it was a nicety for the user.